SystemC Simulation Using Vivado - 2021.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2021-10-22
Version
2021.2 English

Running SystemC simulation design needs:

  • Creating design sources
  • Compiling simulation models using compile_simlib
  • Specify tool/design settings needed

c/c++/SystemC sources can be compiled using GCC. Each simulator supports different versions of GCC. If design contains Xilinx provided SystemC models, GCC version used should be the supported version. Design needs to be re-compiled if GCC version changes.