Clocking the PL Kernels - 2020.2 English

Versal ACAP AI Engine Programming Environment User Guide (UG1076)
Document ID
UG1076
Release Date
2020-11-24
Version
2020.2 English

For every design, there are a variety of combinations of PL kernels, inside or outside the AI Engine graph. Depending on how the graph is designed and what kernel type is being used, specific clocking is required during the build process. PL kernel clocking is versatile and must be set up at certain points in the flow; this allows you to set the exact frequency to run the kernel at. To set the exact frequency of a PL kernel in the graph you must specify the clocking in three locations:

  • ADF graph
  • Vitis compilation (v++ -c)
  • Vitis linking (v++ -l)

For PL kernels that are outside the graph, specify the clocking in two locations:

  • Vitis compilation (v++ -c)
  • Vitis linking (v++ -l)

You must specify the clocking depending on where the kernels are located. The following table describes the default clocks based on the kernel location.

Table 1. Default Kernel Clocks
Kernel Location Description
Kernels Clocked per the AI Engine clock frequency. All cores run with the same clock frequency.
PL Kernels in AI Engine Graph Default frequency for all PL kernels – a quarter of the AI Engine clock frequency derived from the platform.

Clock frequency for all PL kernels can be specified using AI Engine compiler option aiecompiler --pl-freq=100

PL Kernels Outside AI Engine Graph HLS: Default frequency for all HLS kernels - 150 MHz

RTL: Frequency is set to the frequency that the XO file was compiled with.
PL Kernels Added to Platform Using the Vitis Linker Platforms have a default clock. If no clocking option is set at the command line or configuration file the default clock is used. This default can be overridden depending on the design and required clock value, as shown in the following table.

Setting the clocks at the V++ link step allows you to choose a frequency based on the platform. The following table describes the Vitis compiler clocking options during the link step v++ --link.

Table 2. Vitis Linking Clock Options
[clock] Options Description
--clock.defaultFreqHz arg Specify a default clock frequency to use in Hz.
--clock.defaultId arg Specify a default clock reference ID to use.
--clock.defaultTolerance arg Specify a default clock tolerance to use.
--clock.freqHz arg <frequency_in_Hz>:<cu_0>[.<clk_pin_0>][,<cu_n>[.<clk_pin_n>]]

Specify a clock frequency in Hz and a list of associated compute unit names and optionally their clock pins.
--clock.id arg <reference_ID>:<cu_0>[.<clk_pin_0>][,<cu_n>[.<clk_pin_n>]]

Specify a clock reference ID and a list of associated compute unit names and optionally their clock pins.
--clock.tolerance arg <tolerance>:<cu_0>[.<clk_pin_0>][,<cu_n>[.<clk_pin_n>]]

Specify a clock tolerance and a list of associated compute unit names and optionally their clock pins.

The following table describes the steps to set clock frequencies for kernels, inside and outside the ADF graph, for the relevant PL kernel type.

Table 3. Compiling PL Kernels with Non-default Clocking
PL Kernel Location Clock Specification
Inside ADF Graph
  1. Specify the clock frequency per PL kernel in the graph
    • For PL kernel: 
      adf::pl_frequency(<pl_kernel> = <FreqMHz>;
    • For PLIO kernel: 
      adf::PLIO *<input> = new adf::PLIO(<logical_name>, <plio_width>, <file>, <FreqMHz);
  2. Compile the HLS code using the Vitis compiler. For RTL kernels, go to step 3.
    v++ -c -k kernelName kernel.cpp --hls.clock freqHz:kernelName
    Note: To change the frequency at which HLS kernels are compiled use: --hls.clock arg:kernelName. arg must be in Hz. (for example, 250000000Hz is 250 MHz).
  3. Per kernel, specify the clock it uses in the Vitis linker. 
    v++ -l ... --clock.freqHz <freqHz>:kernelName.ap_clk
Outside ADF Graph
  1. Compile the HLS code using the Vitis compiler. For RTL kernels, go to step 2.
    v++ -c -k kernelName kernel.cpp --hls.clock freqHz:kernelName
    Note: To change the frequency at which HLS kernels are compiled use: --hls.clock arg:kernelName. arg must be in Hz. (for example, 250000000Hz is 250 MHz).
  2. Per kernel, specify the clock it uses in the Vitis linker.
    v++ -l ... --clock.freqHz <freqHz>:kernelName.ap_clk
Note: Clocking changes at the linker stage take precedence.

See Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393) for more detailed information on how to compile kernels for specific platform clocks and clocking information.