Sysmon - 2024.1 English

Power Design Manager User Guide (UG1556)

Document ID
UG1556
Release Date
2024-05-30
Version
2024.1 English

The System Monitor (SYSMON) monitors the UltraScale+ devices' physical environment using on-chip temperature and supply sensors, external analog inputs, and an integrated analog to digital converter (ADC).

Figure 1. SYSMON

In the UltraScale+ device, you can power down the SYSMON if unused, to save power. In the SYSMON table, set Powered Down to Yes if it is powered down by setting the power down bits in the device configuration register or by disconnecting the VCCADC supply. Set Powered Down to No if the SYSMON will not be powered down.

Note: Because SYSMON is ON by default in the FPGA, the SYSMON power is reported as part of the static power.

Clock (MHz) specifies the frequency of the DRP clock if the design uses the SYSMON. Leave this blank if your design does not instantiate the SYSMON or the SYSMON is powered down.

The SYSMON is described in the UltraScale Architecture System Monitor User Guide (UG580).