I/O Interfaces - 2024.2 English - UG1556

Power Design Manager User Guide (UG1556)

Document ID
UG1556
Release Date
2024-11-18
Version
2024.2 English

I/O interfaces are bank-wise configurable. The maximum number of I/O pins per bank is 26. The bottom row of the each GPIO Bank table displays the available number of GPIO for each bank. The number of available GPIO changes as you select interfaces. If you use more than the available IO in a bank, PDM tool alerts you by highlighting the Used total in red in the corresponding Bank row. You should then correct the GPIO overutilization and select interfaces from another bank.

Note: Power section in the following table only reports power on VCCO_50x IOs and I/O power in VCC_PSLP is not reported in this table.
Figure 1. GPIOs available after Selection of Interfaces

You can configure GPIO bank voltage from I/O banks.

Figure 2. Voltage Selections