[Figure 1, callout 7]
The ZCU216 board includes a secure digital input/output (SDIO) interface to provide access to general purpose non-volatile SDIO memory cards and peripherals. Information for the SD I/O card specification can be found on the SanDisk Corporation or SD Association websites. The ZCU216 SD card interface supports the SD1_LS configuration boot mode documented in the Zynq UltraScale+ Device Technical Reference Manual (UG1085).
The SDIO signals are connected to ZU49DR RFSoC PS bank 501 which has its VCCMIO set to 1.8V. The six SD interface nets MIO[46:49]_SDIO_DAT[0:3], MIO50_SDIO_CMD, and MIO51_SDIO_CLK each have a series 30Ω resistor at the Bank 501 source. An NXP IP4856CX25 SD 3.0-compliant voltage level-translator U23 is present between the ZU49DR RFSoC and the SD card connector (J23). The NXP IP4856CX25 U23 device provides SD3.0 capability with SDR104 performance.
The following figure shows the connections of the SD card interface on the ZCU216 board.
The NXP SD3.0 level shifter is mounted on an Aries adapter board that has the pin mapping shown in the following table.
| Aires Adapter Pin Number | IP4856CX25 U23 Pin Number | IP4856CX25 U23 Pin Name |
|---|---|---|
| 1 | C1 | CLK_IN |
| 2 | C3 | GND |
| 3 | D3 | CD |
| 4 | D2 | CMD_H |
| 5 | E2 | CLK_FB |
| 6 | E4 | WP |
| 7 | B4 | VLDO |
| 8 | C4 | VSD_REF |
| 9 | A3 | DIR_0 |
| 10 | A4 | VSUPPLY |
| 11 | B3 | VCCA |
| 12 | A2 | DIR_CMD |
| 13 | D1 | DATA0_H |
| 14 | B2 | SEL |
| 15 | B1 | DATA3_H |
| 16 | E1 | DATA1_H |
| 17 | E3 | DIR_1_3 |
| 18 | A1 | DATA2_H |
| 19 | E5 | DATA1_SD |
| 20 | D5 | DATA0_SD |
| 21 | C5 | CLK_SD |
| 22 | D4 | CMD_SD |
| 23 | B5 | DATA3_SD |
| 24 | A5 | DATA2_SD |
| 25 | C2 | ENABLE |
For more information on the IP4856CX25, see the NXP website.
The detailed RFSoC connections for the feature described in this section are documented in the ZCU216 board XDC file, referenced in Xilinx Design Constraints.