I/O Voltage Rails

ZCU216 Evaluation Board User Guide (UG1390)

Document ID
UG1390
Release Date
2023-12-07
Revision
1.2 English

The ZU49DR RFSoC PL I/O bank voltages on the ZCU216 board are listed in the following table.

Table 1. I/O Voltage Rails
ZU49DR Power Net Name Voltage Connected To
PL Bank 64 VCC1V2 1.2V PL_C0_DDR4_DQ[0:31]
PL Bank 65 VCC1V2 1.2V PL_C0_DDR4_ADDR/CTL, SYSMON_SDA/SCL, MSP430_GPIO[0:3]
PL Bank 66 VADJ_FMC 1 1.8V FMCP_HSPC LA BUS [17:33]
PL Bank 67 VADJ_FMC 1 1.8V FMCP_HSPC LA BUS [00:16]
PL Bank 68 VCCIV2 1.2V PL_C1_DDR4_DQ[0:31]
PL_Bank 69 VCC1V2 1.2V PL_C1_DDR4_ADDR/CTL, 8A34001_GPIO[0:15]
PL Bank 84 VCC1V8 1.8V ADCIO[00:15], GPIO_DIP_SW[0:7]
PL Bank 87 VCC1V8 1.8V DACIO[0:15], RGB_G_LED[0:3]
PL Bank 88 VCC1V8 1.8V PMOD0&1[0:7], SFP[0:3]_TX_DISABLE_B, CPU_RESET
PL Bank 89 VCC1V8 1.8V UART2, PL_I2C0/1, CLK104 I/F, CLK_100, GPIO_SW[N,W,C,E,S]
PS Bank 500 VCC1V8 1.8V QSPI LWR/UPR, PS_GPIO2, MIO_I2C0/1, UART0, MIO_LED/PB
PS Bank 501 VCC1V8 1.8V PMU_INPUT, PMU_GPO[0:5], SDIO I/F, PS_GPIO1
PS Bank 502 VCC1V8 1.8V USB (3.0) I/F, ENET I/F
PS Bank 503 VCC1V8 1.8V PS CONFIG I/F
PS Bank 504 VCC1V2 1.2V PS_DDR4_SODIMM (64-BIT) I/F
  1. The ZCU216 board is shipped with VADJ_FMC set to 1.8V by the MSP430 system controller.