IP Customization GUI - 1.0 English

Audio Formatter LogiCORE IP Product Guide (PG330)
Document ID
PG330
Release Date
2020-07-08
Version
1.0 English
Figure 1. Audio Formatter Tab
Component Name
The component name is used as the base name of output files generated for the module. Names must begin with a letter and must be composed from characters: a to z, 0 to 9 and “_”.
Read Interface Options
Enable Audio Read Interface
Enables the MM2S part of the core when selected. All the other Read Interface Options are valid only when this is enabled.
Max Audio Channels
Specifies the maximum number of Audio channels the core can support in MM2S mode. Can be configured as 2, 4, 6 or 8.
Memory Packaging Mode
Specifies the Interleaved or Non-Interleaved mode packaging of data in memory.
Memory Data Format
Configured from a choice of AES and PCM data in memory and audio channels:
  • AES To AES: AES Data in Memory and read as AES data on Stream
  • AES To PCM: AES Data available in Memory and reads only PCM data on stream
  • PCM To PCM: PCM Data available in memory is read on Stream as well
  • PCM To AES (Default): PCM Data in memory is AES encoded and read on Stream
Address Width
Address width of AXI4 Memory mapped MM2S interface.
Asynchronous Clocks
When checked, means the s_axi_lite_aclk and m_axis_mm2s_aclk are asynchronous and all the Clock Domain Crossing of signals within the IP is taken care. When unchecked, the core assumes both clocks to be synchronous, and does not add synchronizers.
Write Interface Options
Enable Audio Write Interface
Enables the S2MM part of the core when selected. All the other Write Interface Options are valid only when this is enabled.
Max Audio Channels
Specifies the maximum number of Audio channels the core can support in S2MM mode. Can be configured as 2, 4, 6 or 8.
Memory Packaging Mode
Specifies the Interleaved or Non-Interleaved mode packaging of data in memory.
Memory Data Format
Configured from a choice of AES and PCM data in memory and audio channels:
  • AES To AES: AES Data on stream and the same is written to memory
  • AES To PCM(Default): AES Data on stream is decoded and PCM data is written to memory
  • PCM To PCM: PCM Data on stream is written to memory directly.
Address Width
Address width of AXI4 Memory mapped S2MM interface.
Asynchronous Clocks
When checked, this means s_axi_lite_aclk and s_axis_s2mm_aclk are asynchronous, and all the Clock Domain Crossing of signals within the IP is taken care of. When unchecked, the core assumes both clocks to be synchronous, and does not add synchronizers.
Note: The IP requires more resources when using Asynchronous clock mode compared to synchronous clock mode.