Soft Reset Register (0x04) - 2.0 English

UHD SDI Audio LogiCORE IP Product Guide (PG309)

Document ID
PG309
Release Date
2024-05-30
Version
2.0 English
Table 1. Soft Reset Register - UHD-SDI Audio (Extract)
Bit Field Name Access Type Default Value Description
31:2 Reserved N/A 0 Reserved
1 core_reset R/W 0 This bit when set to 1, resets the data path of the core
0 config_reset RW1C 0 This bit when set to 1, resets the configuration registers.