Main Link Setup and Management - 3.1 English

DisplayPort 1.4 TX Subsystem Product Guide (PG299)

Document ID
PG299
Release Date
2024-05-30
Version
3.1 English

This section is intended to elaborate on and act as a companion to the link training procedure in the VESA DisplayPort Standard v2.x.

AMD advises all users of the source core to use an Arm® processor, a MicroBlaze™ processor, or similar embedded processor to properly initialize and maintain the link. The tasks encompassed in the Link and Stream Policy Makers are likely too complicated to be efficiently managed by a hardware-based state machine. AMD does not recommend using the RTL based controllers, and such controllers are not supported through the service portal.

Figure 1. Source Main Link Datapath