The subsystem supports a special AUX channel command intended to make I2C over AUX transactions faster and easier to perform. In this case, the host bypasses the external I2C master/slave interface and initiates the command by directly writing to the register set.
| AUX_COMMAND[11:8] | Command |
|---|---|
| 0x0 | IIC Write |
| 0x4 | IIC Write MOT |
| 0x1 | IIC Read |
| 0x5 | IIC Read MOT |
| 0x6 | IIC Write Status with MOT |
| 0x2 | IIC Write Status |
Because I2C transactions might be significantly slower than AUX channel transactions, the host should be prepared to receive multiple AUX_DEFER reply codes during the execution of the above state machines.
- MOT Definition
-
- Middle Of Transaction bit in the command field.
- This controls the stop condition on the I2C slave.
- For a transaction with MOT set to 1, the I2C bus is not STOPPED, but left to remain the previous state.
- For a transaction with MOT set to 0, the I2C bus is forced to IDLE at the end of the current command or in special Abort cases.
- Partial ACK
- For I2C write transactions, the Sink core can respond with a partial ACK (ACK response followed by the number of bytes written to I2C slave).
- Write Address Only and Read Address Only
- These commands do not have any length field transmitted over the AUX channel. The
intent of these commands are to:
- Send address and RD/WR information to I2C slave. No Data is transferred.
- End previously active transaction, either normally or through an abort.
The Address Only Write and Read commands are generated from the source by using Bit[12] of the command register with command as I2C WRITE/READ.
- Write Status
- This command does not have any length information. The intent of the command is to
identify the number of bytes of data that have been written to an I2C slave when a
Partial ACK or Defer response is received by the source on a AUX-I2C write.
The Write status command is generated from the source by using Bit[12] of the command register with command as I2C WRITE STATUS.
- IIC Timeout
- The Sink controller monitors the IIC bus after a transaction starts and looks for an IIC stop occurrence within 1 second. If an IIC stop is not received, it is considered as an IIC timeout and the sink controller issues a stop condition to release the bus. This timeout avoids a lock-up scenario.