External Video PHY Clock Interface - 3.1 English

DisplayPort 1.4 TX Subsystem Product Guide (PG299)

Document ID
PG299
Release Date
2024-05-30
Version
3.1 English
Table 1. External Video PHY Clock Interface
Port Name I/O Description
tx_lnk_clk I Link clock input from external Video PHY
tx_enc_clk I 8B10B encoder clock from external Video PHY and applicable only for AMD Versal™ device designs. Refer to AMD Versal™ Device Support.