Virtualization with Hypervisor - 2020.2 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
Release Date
2020.2 English

Versal devices have hardware virtualization extensions on the Arm Cortex-A72 processors, Arm GIC-500 interrupt controller, and Arm System MMU (SMMU) that enables the use of hypervisors and enables greater hypervisor performance.

The following figure shows an example hypervisor architecture running on a Versal device. In this example, the hypervisor runs an SMP-capabable OS, such as Linux, an RTOS, or a bare-metal application.

Figure 1. Example Hypervisor Architecture

The addition of a hypervisor does bring design complexity to low-level system functions such as power management, PL management, OpenAMP software stack, and security accelerator access that must use additional underlying layers of system firmware. Xilinx recommends that developers initiate early effort into these aspects of system architecture and implementation.