Error Management Hardware - 2020.2 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
Release Date
2020.2 English

The Versal device has a dedicated error handler to aggregate and handle fatal errors across the SoC. The Error Manager handles the fatal errors using its hardware to trigger either SRST/PoR/Error out, or an interrupt to PMC/PSM.

For more information, refer to the Versal ACAP Technical Reference Manual (AM011).