Secondary Boot Process and Device Choices - 2020.2 English

Versal ACAP System Software Developers Guide (UG1304)

Document ID
Release Date
2020.2 English

The boot process can be based on a primary boot device such as SD, eMMC, QSPI, OSPI, or slave interfaces such as JTAG, or SelectMAP. Optionally, the boot process starts using a primary boot device, and then is completed using a secondary boot device. In this case, the PLM loads images from primary boot device and configures the secondary boot device. The secondary boot device contains a PDI that includes images and configuration data that needs to be loaded from the secondary boot device. This secondary boot device does not contain a PLM or a boot header. The secondary boot process occurs if a secondary boot device is specified in a field in the PDI meta header. At POR/system reset, the boot process starts with the primary boot:

  • Reads boot mode register to determine the primary boot device
  • Loads the PLM from the specified primary boot device into the PPU RAM
  • Releases the PPU to execute the PLM
  • Determines the specified secondary boot device from a field in PDI meta header
  • Uses the specified secondary boot device to load the remainder of the PDI content
Note: The secondary boot device cannot be the same as the primary boot device.

The secondary boot devices include:

  • eMMC0, eMMC1
    Note: There are two controllers (eMMC0 and eMMC1). Each controller allows two different sets of MIO to be assigned or an EMIO option. Primary boot on the first slot (eMMC0) is not supported. The second slot (eMMC1) cannot be used because it conflicts with the QSPI MIO pins. The first slot eMMC1 (MIO26-36) can be used for secondary boot.
  • Ethernet
    Note: When Ethernet is used as a secondary boot device, Versal ACAP is first booted up to U-Boot using the primary boot device. U-Boot can then use Ethernet to complete the boot process.
  • OSPI
  • PCIe┬« interface
    1. First, the PLM is loaded from the primary boot device into the PPU RAM.
    2. Then, the PLM runs and initializes the Cache Coherent Interconnect for Accelerators (CCIX) PCIe Gen4 Module (CPM) block in PCIe Endpoint (EP) mode.
    3. Finally, the PCIe host, as a secondary boot device, loads the rest of the images.
      Note: PCIe interface is supported only as secondary boot device.
  • QSPI
  • SD0, SD1
  • USB

    The secondary PDI is downloaded using dfu_util to a fixed DDR address (0x50000000). The dfu_util is an open source utility available for Windows and Linux. The PLM then processes the PDI.

    To indicate USB as a secondary boot mode, specify usb as the boot_device attribute in the BIF file.

  • SelectMAP (SMAP)

    Use smap as the boot device attribute for SelectMAP as secondary boot mode in the BIF file.