Running Memory DRCs - 2024.1 English

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)

Document ID
UG899
Release Date
2024-05-30
Version
2024.1 English

After assigning or modifying pin assignments, you must run the default DRC rule deck on the elaborated or synthesized design using the Report DRC command as described in Running DRCs‌‌.

Note: More design rules are available in the synthesized design, because the netlist is complete.