Features - 2.0 English

Versal Adaptive SoC GT Controller for DisplayPort and SDI LogiCORE IP Product Guide (PG398)

Document ID
Release Date
2.0 English
  • Supports GTYE5 and GTYP transceiver configuration presets for industry standards for SMPTE AMD Versalâ„¢ adaptive SoC GT Controller.
  • Supports the following line rates as per standards compliance:
    SMPTE ST 259
    SD-SDI at 270 Mbps.
    SMPTE RP 165
    EDH for SD-SDI.
    SMPTE ST 292
    HD-SDI at 1.485 Gbps and 1.485/1.001 Gbps.
    SMPTE ST 372
    Dual Link HD-SDI.
    SMPTE ST 424
    3G-SDI with data mapped by any ST 425-x mapping at 2.97 Gbps and 2.97/1.001 Gbps.
    SMPTE ST 2081-1
    6G-SDI with data mapped by any ST 2081-x mapping at 5.94 Gbps and 5.94/1.001 Gbps.
    SMPTE ST 2082-1
    12G-SDI with data mapped by any ST 2082-x mapping at 11.88 Gbps and 11.88/1.001 Gbps.
  • Dual link and quad link 6G-SDI and 12G-SDI supported by instantiating two or four SMPTE UHD-SDI RX or TX subsystems (each SDI link requires a core instantiation).
  • Transceiver can be configured as unidirectional and bidirectional.
  • Transceiver site and reference clock selection interface.
  • Transceivers can be configured with PICXO to provide advanced options to tune performance.
  • Optional exposure of any transceiver port depending upon the selected configuration.
  • Each simplex and each duplex requires the core to be instantiated.
  • Provides flexibility to configure GT data width and PLL types based on your requirement.
  • Protocol support for DisplayPort 1.4.
  • Supports block automation for the SDI Protocol.