SGDMA Descriptor Control Register (0x18) - 4.1 English - PG195

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2024-12-18
Version
4.1 English
Table 1. SGDMA Descriptor Control Register (0x18)
Bit Index Default Access Type Description
W1C Bit descriptions are the same as in SGDMA Descriptor Control Register (0x10).