The AI Engine Pipeline view in the Vitis IDE allows you to correlate instructions executed in a specific clock cycle with the labels in the Disassembly view. The underlying AI Engine pipeline is exposed in debug mode using the pipeline view. The Vitis IDE only supports pipeline view for graphs containing single kernels.
To enable the Pipeline view on graphs with a single kernel, select Generate Profile from the project debug configuration after the project has been built successfully.
Important:
- If your graph has multiple tiles this view does not appear; however the case with multiple kernels in a single tile is supported.
- The pipeline view support is available with the AI Engine simulator only.
Figure 1.
Debug
Configuration Dialog Box
Click on Debug to start debugging the application. Note the Pipeline view shows up automatically in the Debugger Console window.
Figure 2. Pipeline View
Run-time statistics of the kernel in the pipeline view are highlighted in the previous figure.
- AI Engine kernel cycle count
- Program counter
- ID = Instruction decode
- E1-E7 are the AI Engine execution
stages. Almost all operations in the scalar unit are scheduled in E1 stage of the
pipeline besides non-linear operations. The vector unit scheduling spans from the ID
stage to the E6 stage. Address Generation Units (AGUs) span over two pipeline
stages. The address is ready in the E2 stage of the pipeline. For load units, the
data will be available in the AI Engine from the
memory module in the E7 stage. For the store unit, the data will be sent out from
the AI Engine to the memory module in the E5 or
E6 stage of the pipeline depending on the type of instruction.Note: The green column in Pipeline View indicates multiple pipeline stages in different instructions to be executed.
- Step over in the debug view. As shown the previous instruction, this
is run in E1 stage. The result is updated in Registers View. Figure 3. Stepping Over with Pipeline View
