Generating VCD with Select Signals - 2023.1 English - UG1076

By default, aiesimulator used with the --dump-vcd option dumps all signals. As a result, using this option slows down simulation. Alternatively, using options to dump only select signals associated with specific modules improves the simulation speed. To debug a design, it is recommended that you run aiesimulator with --dump-vcd to dump all the signals. After the issue is narrowed down, run the aiesimulator with options to only dump a subset of VCD signals. This can be achieved by a aiesimulator option passed through an options text file for selecting signals. Signals are selected based on the input given in the text file.

To enable VCD dump for specific modules, select the module type in a text file, and pass the file an input to the aiesimulator command line. The contents of the file is merged into the generatedaie_simulator/aiesim_options.txt. The usage of this file in the HW emulation flow remains the same. Options passed to the aiesimulator command line will have higher precedence over the same options provided in the options file.

 aiesimulator --options-file=<user_aiesim_options.txt> --dump-vcd=<file_name>

The list of modules that can be selected for VCD is found below. By default, all modules except CLK are set to true. Set the option to false to turn off modules.

AIE_DUMP_VCD_IO=true/false
     AIE_DUMP_VCD_DMA=true/false
     AIE_DUMP_VCD_CORE=true/false   
     AIE_DUMP_VCD_SHIM=true/false 
     AIE_DUMP_VCD_STREAM_SWITCH=true/false
     AIE_DUMP_VCD_CLK=true/false

This categorization of module signals is directly related to the category of the information shown on the Vitis Analyzer IDE:

I/O

Signals associated with AI Engine kernel input/output, locks, stalls

DMA

Signals associated with DMA transfers, and locks

Core

Signals associated with processor module, program and data memory

Shim

Signals associated with all shim tiles

Stream Switch

Signals associated with all the streams on the stream switch boundary

The Vitis Analyzer IDE displays the module signals waveforms for signals selectively generated in VCD. The following section explains the details of each VCD module selection and the dump details.

AI Engine Kernel I/O

Use AIE_DUMP_VCD_IO in the options.txt file to enable or disable input and output signals.

The generated VCD data is displayed in the Core section on the Trace view along with its functions and core lock requests. These functions are displayed with their transitions, and the kernel I/Os for the supported data types for all AI Engine tiles. All the stall signals for lock requests can also be seen. The stalls on functions stalls include cascade, stream lock and memory stalls.

Figure 1. Example of AI Engine Kernel I/O Data

DMA

Use AIE_DUMP_VCD_DMA in options.txt file to enable or disable DMA signals.

In the generated DMA VCD data, you will see the DMA transactions on M2S and S2MM channels, associated buffer descriptors, locks including the values of the locks, lock IDs and read/write requests on locks can be seen. MM2S, S2MM transactions with the channel ID (Ch0 in the figure below), buffer descriptors (BD0- BD3) and the associated locks (lock0 - lock3) with the values on those locks, indicating if they have been acquired for read or write.

Figure 2. Example of DMA VCD Data

Core

Use AIE_DUMP_VCD_CORE in options.txt to enable or disable Core signals.

The Core generated VCD data is a combination of kernels, I/O and the DMA signals. This data is found in the Core section in the trace window, where you can see the functions and all the function transitions. All the stalls on those functions and the kernel I/O with the core requesting read and write locks. DMA signals has only the DMA transactions, S2MM, MM2S with channels, BD and lock selections, and the locks to correlate things with the DMA transactions.

Figure 3. Example of Core Data

Shim Tile

Use AIE_DUMP_VCD_SHIM in options.txt to enable or disable Shim Tile signals.

The streams, for events on Shim tiles, are shown when you have the VCD Shim trace enabled. When Shim trace is enabled,you will see only the net mapped to that Shim tile. Currently vitis_analyzer supports only a few nets passthrough shim tiles under the network section. You may see those nets, if Stream switch configurations are enabled along with Shim tiles.

Figure 4. Example of Shim Tile Data

Stream Switch

Use AIE_DUMP_VCD_STREAM_SWITCH in the options.txt file to enable or disable Stream Switch signals.

Trace contains all the Nets related to the network for all the tiles under the stream switch. Only the network events can be seen in the trace.

Figure 5. Example of Stream Switch Data