References - 2021.2 English

These documents provide supplemental material useful with this guide:

1. UltraScale Architecture System Monitor User Guide (UG580)
2. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
3. Vivado Design Suite Tcl Command Reference Guide (UG835)
4. Vivado Design Suite User Guide: Using Constraints (UG903)
5. Xilinx Power Estimator User Guide (UG440)
6. Vivado Design Suite Tutorial: Power Analysis and Optimization (UG997)
7. Vivado Design Suite User Guide: Logic Simulation (UG900)
8. 7 Series FPGAs Packaging and Pinout Product Specification (UG475)
9. UltraScale and UltraScale+ FPGAs Packaging and Pinouts Product Specification (UG575)
10. 7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480)
11. Versal ACAP AI Engine Programming Environment User Guide (UG1076)
12. Versal ACAP Design Guide (UG1273)
13. Xilinx Power Estimator User Guide for Versal ACAP (UG1275)
14. Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)
15. Versal ACAP Integrated Block for PCI Express LogiCORE IP Product Guide (PG343)
16. Control, Interface and Processing System LogiCORE IP Product Guide (PG352)
17. Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956)
18. Versal ACAP GTY and GTYP Transceivers Architecture Manual (AM002)
19. Versal ACAP DSP Engine Architecture Manual (AM004)
20. Versal ACAP System Monitor Architecture Manual (AM006)
21. Versal ACAP Packaging and Pinouts Architecture Manual (AM013)
22. Versal ACAP CPM CCIX Architecture Manual (AM016)
23. Seven Steps to an Accurate Worst-Case Power Analysis using the Xilinx Power Estimator (XAPP1348)
24. Driving the Xilinx Analog-to-Digital Converter (XAPP795)
25. Vivado Design Suite Documentation