-
set_switching_activity
Set the activity of the specified elements. You can set either static probability and signal rate or static probability and toggle rate. Examples are:
- To set default switching activity on primary ports and
black box outputs of the entire
design:
set_switching_activity -default_static_probability 0.5 -default_toggle_rate 12.5
- To set the signal rate on a
port/net/pin:
set_switching_activity -static_probability 0.5 -signal_rate 50 [get_ports din*]
Important: Signal rate must be > 0 when static probability is > 0 and <1. Similarly, static probability must be 0 or 1 when signal rate is 0. Static probability and signal rate must be specified together. - To set default switching activity on primary ports and
black box outputs of the entire
design:
- To set toggle rate on
port/net/pin:
set_switching_activity -static_probability 0.5 -toggle_rate 25 [get_nets din_int*]
Note that the toggle rate is specific to the clock associated with the element and the valid range is 0 to 100.
- Setting Switching activity on a group of nodes:
The
set_switching_activity
command can also be used to set activity rates on a group of nodes (called types), using the -type option. The supported types are listed in the following table:
Type Name | Switching Activity Applied To | PIN Name(s) | Cell Name(s) |
---|---|---|---|
bram_enable | Enable pins of block RAM | ENARDEN/ENBWREN | RAMB36/18 |
bram | All the active data outputs of block RAM | DOADO/DOBDO | RAMB36/18 |
bram_wr_enable | Write enable pins of block RAM | WEA/WEBWE | RAMB36/18 |
register | Output pin of FF/Latch | Q | FD* |
shift_register | Output pin of Shift-Registers | Q | SRL* |
lut_ram | Output data pin of RAM | O | RAM(32|64|128|256)* |
lut | Output pin | O | LUT* |
dsp | All the data outputs of DSPs | P/ACOUT/BCOUT/PCOUT | DSP48 |
gt_txdata | TX data in port | TXDATA | GT*_CHANNEL |
gt_rxdata | RX data out port | RXDATA | GT*_CHANNEL |
io_output | Primary outputs | get_ports -filter {DIRECTION = OUT} && ‘I’ pin of OBUF* & IOBUF* | OBUF* |
io_bidir_enable | Enable pin of Bidir ports | T | OBUF* |
The following section describes usage in the set_switching_activity
command. To set the specified
switching activity on all LUTs in the design top
scope:
set_switching_activity -type lut –static_probability 0.5 –toggle_rate 25 [get_cells]
To set the specified toggle rate and static probability on all registers in the hierarchy of CPU/MEM:
set_switching_activity -type register -toggle_rate 0.4 -static_probability 0.5 [get_cells CPU/MEM]
To set the specified toggle rate and static probability on all registers in the hierarchy of CPU/ and the hierarchy underneath:
set_switching_activity -type register -toggle_rate 0.4 -static_probability 0.5 –hier [get_cells CPU]
To Set the specified switching activity on all primary outputs
set_switching_activity -type io_output –static_probability 0.5 -toggle_rate 0.4 -all
(toggle_rate/200) =<
static_probability =< 1-(toggle_rate/200
. Use the signal rate
setting for considering glitch switching, along with actual activity
rate.create_clock
,
create_generated_clock
, set_case_analysis
, etc).-
report_switching_activity
Reports the activity of the specified elements. Displays static probability, signal rate and toggle rate. The command also displays the source of the assigned switching activity. Examples of
report_switching_activity
commands are:- Report static probability, signal rate, and toggle rate
for a single
net:
The source of the assigned switching activity is expressed as: (C)=XDC Constraints, (D)=Tool Default, (S)= SAIF Annotated, (A)=User Assigned.Vivado% report_switching_activity -static_probability [get_ports clk_p] clk_p: static probability = 0.5 (C) Vivado% report_switching_activity [get_ports clk_p] clk_p: static probability = 0.5 (C) signal rate = 400 (C) toggle rate = 200 (C)
- Report on group nodes:
To report switching activity for all distributed RAMs in the hierarchy CPU/:
report_switching_activity –type lut_ram [get_cells CPU/*]
To report switching activity for all GT RXDATA in the design:
See Table 1 table for information on the supported types.report_switching_activity –type gt_rxdata -all
- Report static probability, signal rate, and toggle rate
for a single
net:
- Report average switching activity over a list of nets:
- Switching activity of a bus
-
report_switching_activity -average [get_nets bussed_signal[*]]
- Switching activity of an instance
-
report_switching_activity -average [get_nets -top -hier -filter {TYPE==SIGNAL && NAME =~ "Instance_Name"}
- Switching activity of whole design
-
report_switching_activity -average [get_nets -top -hier -filter {TYPE==SIGNAL}
The -average option can calculate typical switching activity of existing designs, and that activity can be applied in XPE to estimate power of similar designs.
-
reset_switching_activity
Resets the activity rates (static probability, signal rate, and toggle rate) on specific netlist elements to the tool default value. The command resets both user specified values and Simulation activity rate settings. Examples are:
- To reset default switching activity on primary ports and
black box outputs of the entire
design:
reset_switching_activity -default
- To reset activity rates on the entire
design:
reset_switching_activity -all
- To reset activity rate on specific
port/net/pin:
reset_switching_activity [get_ports din*]
- To reset activity rates on a group of nodes:
To reset the switching activity for all block RAM enables (ENARDEN/ENBWREN) in the entire design:
reset_switching_activity –type bram_enable -all
To reset the switching activity for all LUTs in the hierarchy CPU/ and levels underneath:
reset_switching_activity –type lut –hier [get_cells CPU/MEM]
- To reset default switching activity on primary ports and
black box outputs of the entire
design:
-
read_saif
Read an SAIF simulation output file and annotate matched netlist elements with the switching activity described in the file. An examples is:
read_saif -out_file read_saif.rpt -strip_path tb/tb_core/core -file routed.saif
Options to
read_saif
are:-
out_file
- Dumps the unmatched simulation and design nets list into a file.
-
strip_path
- By default it is assumed that the design top is instantiated in the test bench. Thus the first two levels of hierarchy are stripped while annotating SAIF data into the design. If the simulation setup has multiple hierarchy levels, then you are expected to specify the hierarchy to be stripped off from SAIF to better match the actual design.
-
The read_saif
command also
displays the SAIF annotation summary to show the number of design nets matched.
Ideally 100% design net match is expected for an accurate analysis.
read_saif
command will not modify
the activities on the design clock nets. Clock nets activities will be driven by the
timing constraints.
read_saif
command can be executed multiple times with each SAIF file.
This will enable you to read multiple SAIF files for different blocks in design.
Report power then estimates the power by considering the switching activity
information from all the SAIF files. If common nets exist in multiple SAIF files,
then the switching activity will be applied from the last read SAIF file using
read_saif
command.
-
create_clock
Synthesis and implementation constraint to specify clock waveforms. An example is:
create_clock -name clk -period 5 [get_ports clk]; # 200MHz
-
create_generated_clock
Synthesis and implementation constraint to specify generated clock waveforms. An example is:
create_generated_clock -name gen_clk -source clk1 -divide_by 2 [get_net -hier sys_clk]
-
set_input_delay
Associates primary inputs to the specific clock. This is very important in a multi-clock design, especially if the primary port is launched at a different clock. An example is:
create_clock -name clk1 -period 5 [get_ports clk] set_input_delay -clock clk1 1 [get_ports d]
Note: If the primary ports are not associated with any clock, then the switching rate is computed based on the capturing clock in the path.
By default, create_clock
and
create_generated_clock
are defined in the XDC
file and you need not rerun them. However, to do What If? analysis, such as by
changing the clock frequency for Report Power, create_clock
or create_generated_clock
must be used to reflect the
change.