Using IBERT GTY for Transceiver Link Characterization - 2021.2 English

Versal ACAP System Integration and Validation Methodology Guide (UG1388)

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2021.2 English

Versal ACAP GTY transceivers support an Integrated Bit Error Ratio Tester (IBERT) which enables in-system serial I/O validation and debug. This allows the measuring and optimization of high-speed serial I/O links.

IBERT should be used when you are interested in measuring the quality of a signal after receiver equalization has been applied to the received signal.

Unlike previous architectures, the Versal ACAP IBERT GTY functionality is integrated into the GTY transceiver and requires only a design which uses the transceivers. For more information on IBERT functionality, see this link in the Versal ACAP Transceivers Wizard LogiCORE IP Product Guide (PG331).