Configuration - 2021.2 English

Versal ACAP System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2021-11-19
Version
2021.2 English

You must first successfully synthesize and implement your design to create a programmable device image (PDI). Once the PDI has been generated and all DRCs are analyzed and corrected, you can load the PDI onto the device using one of the following methods:

Direct Programming
The PDI is loaded directly to the device using a cable, processor, or custom solution.
Indirect Programming
The PDI is loaded into an external flash memory. The flash memory then loads the PDI into the device.

You can use the Vivado tools to accomplish the following:

  • Create the PDI (.pdi).
  • Select Tools > Edit Device to review the configuration settings for PDI generation.
  • Program the device using either of the following methods:
    • Directly program the device.
    • Indirectly program the attached configuration flash device.

      Flash devices are non-volatile devices and must be erased before programming.

    Important: The Vivado Design Suite Device Programmer can use JTAG to read the JTAG_STATUS register data on Xilinx devices. In case of a configuration failure, the JTAG_STATUS register captures the specific error conditions that can help identify the cause of a failure. In addition, the JTAG_STATUS register allows you to verify the Mode pin settings MODE[3:0], check key supplies are detected, and determine the SelectMAP bus width. For details on the JTAG_STATUS register, see the Versal ACAP Technical Reference Manual (AM011).