This section assists you in understanding the design flow of bare metal application development for APU and RPU using the Vitis software platform. The following figure shows the top-level design flow in the Vitis software platform. You can create a C or C++ standalone application project by using the New Application Project wizard.
To create a project, follow these steps:
- Click Note: This is equivalent to clicking on to open the New Project wizard, selecting , and clicking Next.
. The New Application Project dialog box appears.
- Type a project name into the Project Name field.
- Select the location for the project. You can use the default location as displayed in the Location field by leaving the Use default location check box selected. Otherwise, click the check box and type or browse to the directory location.
- Select Create a new platform from hardware (XSA). The Vitis IDE lists the all the available pre-defined hardware designs.
- Select any one hardware design from the list and click Next.
- From the CPU drop-down list, select the processor for which you want to build the application. This is an important step when there are multiple processors in your design. In this case you can either select psu_cortexa53_0 or psu_cortexr5_0.
- Select your preferred language: C or C++.
- Select an OS for the targeted application.
- Click Next to advance to the Templates screen.
The Vitis software platform provides useful sample applications listed in Templates dialog box that you can use to create your project. The Description box displays a brief description of the selected sample application. When you use a sample application for your project, the Vitis software platform creates the required source and header files and linker script.
- Select the desired template. If you want to create a blank project, select Empty Application. You can then add C files to the project, after the project is created.
- Click Finish to create your application project and board support package (if it does not exist).
- Xilinx recommends that you use the Managed Make flow rather than Standard Make C/C++ unless you are comfortable working with make files.For more details on QEMU, see the Xilinx Quick Emulator User Guide: QEMU .
- Cortex®-R5F and Cortex®-A53 32-bit bare metal software do not support 64-bit addressed data transfer using device DMA.
- By default, all standalone applications will run only on APU0. The other APU cores will be off.