Boot Process Overview - 2021.2 English

Zynq UltraScale+ MPSoC Software Developer Guide

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2021.2 English

The platform management unit (PMU) and configuration security unit (CSU) manage and perform the multi-staged booting. You can boot the device in either secure (using authenticated boot image) or non-secure (using an unauthenticated boot image) mode. The boot stages are as follows:

Pre-configuration stage
The PMU primarily controls pre-configuration stage that executes PMU ROM to setup the system. The PMU handles all of the processes related to reset and wake-up.
Configuration stage
This stage is responsible for loading the first-stage boot loader (FSBL) code for the PS into the on-chip RAM (OCM). It supports both secure and non-secure boot modes. Through the boot header, you can execute FSBL on the Cortex®-R5F-0 / R5-1 processor or the Cortex®-A53 processor. The Cortex-R5F-0 processor also supports lock step mode.
Post-configuration stage
After FSBL execution starts, the Zynq UltraScale+ MPSoC enters the post configuration stage.