Description
Configures options for export_design which can either run downstream tools or package a Vivado IP or Vitis compiled kernel object (.xo).
Syntax
config_export [OPTIONS]
Options
-
-description <string>
- Provides a description for the catalog entry for the generated IP, used when packaging the IP.
-
-disable_deadlock_detection
- Disables simulation-only deadlock detection in top level RTL of exported IP/XO file.
-
-display_name <string>
- Provides a display name for the catalog entry for the generated IP, used when packaging the IP.
-
-format (ip_catalog | xo | syn_dcp | sysgen)
- Specifies the format to package the IP. The supported
formats are:
-
ip_catalog
- A format suitable for adding to the Xilinx IP catalog.
-
xo
- A format accepted by the v++ compiler for linking in the Vitis application acceleration flow.
-
syn_dcp
- Synthesized checkpoint file for Vivado Design Suite. If this option is used, RTL synthesis is automatically executed. Vivado implementation can be optionally added.
-
sysgen
- Generates a Vivado IP and .zip archive for use in System Generator.
-
-
-ip_xdc_file <arg>
- Specify an XDC file whose contents will be included in the packaged IP for use during implementation in the Vivado tool.
-
-ip_xdc_ooc_file <arg>
- Specify an out-of-context (OOC) XDC file whose contents will be included in packaged IP and used during out-of-context Vivado synthesis for the exported IP.
-
-ipname <string>
- Provides the name component of the
<Vendor>:<Library>:<Name>:<Version>
(VLNV) identifier for generated IP. -
-library <string>
- Provides the library component of the
<Vendor>:<Library>:<Name>:<Version>
(VLNV) identifier for generated IP. -
-output <string>
- Specifies the output location of the generated IP, .xo, or DCP files. The file is written to the solution/impl folder of the current project if no output path is specified.
-
-rtl (verilog | VHDL)
- Specifies which HDL is used when the
-flow
option is executed. If not specified, Verilog is the default language for the Vivado synthesized netlist. -
-taxonomy <string>
- Specifies the taxonomy for the catalog entry for the generated IP, used when packaging the IP.
-
-vendor <string>
- Provides the vendor component of the
<Vendor>:<Library>:<Name>:<Version>
(VLNV) identifier for generated IP. -
-version <string>
- Provides the version component of the
<Vendor>:<Library>:<Name>:<Version>
(VLNV) identifier for generated IP. -
-vivado_clock <arg>
- Override the specified HLS clock constraint used in Vivado OOC run. This is only used for reporting purposes and will not apply to the exported IP.
-
-vivado_impl_strategy <string>
- Specifies Vivado implementation strategy name. The default name is 'default'.
-
-vivado_max_timing_paths <uint:10>
- Specify the max number of timing paths to report when the timing is not met in the Vivado synthesis or implementation.
-
-vivado_optimization_level (0 | 1 | 2 | 3)
-
Vivado optimization
level. This option sets other
vivado_*
options. This only applies for report generation and will not apply to the exported IP. The default setting is 0. -
-vivado_pblock <arg>
- Specify a PBLOCK range to use during implementation for reporting purposes. This will not apply to the exported IP.
-
-vivado_phys_opt (none | place | route | all)
- Specifies whether Vivado physical optimization should be run during Vivado implementation. Valid values are:
-
none
- Do not run (default).
-
place
- Run post-place.
-
route
- Run post-route.
-
all
- Run post-place and post-route.
-
-
-vivado_report_level (0 | 1 | 2)
- Specifies how many Vivado reports are generated, and does not apply to the
exported IP. The valid values and the associated reports are:
-
0
- Post-synthesis utilization. Post-implementation utilization and timing.
-
1
- Post-synthesis utilization, timing, and analysis. Post-implementation utilization, timing, and analysis.
-
2
- Post-synthesis utilization, timing, analysis, and failfast. Post-implementation utilization, timing, and failfast. This is the default setting.
-
-
-vivado_synth_design_args <string>
- Specifies extra arguments to pass to the Vivado
synth_design
command. The default is-directive sdx_optimization_effort_high
. -
-vivado_synth_strategy <string>
- Specifies Vivado synth strategy name. The default strategy is "default".
Examples
The following example exports the Vitis .xo to the specified file:
export_design -description "Kernel Export" -display_name kernel_export \
-flow impl -format xo -output "tmp/hls_tests/kernel.xo"