IBERT UltraScale+™ PS-GTR (IBERT PS-GTR) transceiver can be used to evaluate and monitor PS-GTR transceivers in Zynq® UltraScale+™ MPSoC devices. With this feature, you can accomplish these tasks:
- Perform eye scans with user data
- Change PS-GTR settings
- View link status
- Check the “lock” status of all phase-locked loops (PLLs) used by all PS-GTR lanes
IBERT PS-GTR transceiver does not provide these capabilities:
- Perform eye scans with raw pseudo-random binary sequence (PRBS) data patterns
- Measure Bit Error Ratio (no bit or error counters)
Note that this solution is purely software based, meaning that no IP or logic is required in the programmable logic (PL) of the device. This documentation guides you through the setup of the PS-GTR Transceivers by creating a first stage boot loader (FSBL). It then demonstrates how to load the FSBL into the Zynq UltraScale+ MPSoC and use IBERT PS-GTR.
Tip: This is a supported feature in
Vivado® Design Suite 2017.2 and above.