- Launch the Vivado IDE.
- Click Create Project. This opens up the New Project wizard. Click Next.
- Set the Project Name to proj_synplify. Click Next.
- Under Project Type, select Post-synthesis Project. Click Next.
- Under Add Netlist Sources, click Add Files, navigate to the Vivado_Debug/synopsys/rev_1 folder, and select sinegen_demo.edf. Click OK.
- Add the netlist file created in the previous section. Click Add Files
again, navigate to the
proj_synplify_netlist/proj_synplify_netlist.runs/synth1 folder
and select sinegen.dcp.
Add the DCP files created for the sub-module IPs in the previous section. Click Add Directories again, navigate to the proj_synplify_netlist/proj_synplify_netlist.srcs/sources_1/ip folder and select the following:
- sine_high
- sine_mid
- sine_low
Click OK in the Add Source Files dialog box. In the Add Netlist Sources dialog box ensure that Copy Sources into Project is selected. Click Next.
- Click Add Files, navigate to the Vivado_Debug/src folder, and select the sinegen_demo_kc705.xdc file. This file has the appropriate constraints needed for this Vivado project. Click OK in the Add Constraints File dialog box. In the Add Constraints (optional) dialog box ensure that Copy Constraints into Project is selected. Click Next.
- Under Default Part, select Boards and then select Kintex-7 KC705 Evaluation Platform and the right version number for your hardware. Click Next.
- Under New Project Summary, ensure that all the settings are correct and click Finish.
- In the Sources window, ensure sinegen_demo.edf is selected as the top module.