- In the Flow Navigator, under the Program and Debug drop-down list, click Generate Bitstream.
- In the Save Project dialog box, click Save.
- When the Bitstream generation finishes, the Bitstream Generation Completed dialog box pops up and Open Implemented Design is selected by default. Click OK.
- If you get a dialog box asking to close the synthesized design before opening the implemented design, click Yes.
- Proceed to Using the Vivado Logic Analyzer to Debug Hardware to complete the rest of this lab.