GT Location Constraint - 2020.2 English

Vivado Design Suite User Guide System-Level Design Entry (UG895)

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2020.2 English

For generating a GT location constraint, Ethernet related interfaces have a GT_LOC parameter in the board interface. For example, the sgmii interface of the KC705 board has GT_LOC= GTXE2_CHANNEL_X0Y9. Here the Ethernet IP assumes that if this parameter is not present in the board interface, then it is running in LVDS mode, so the IP customization will generate a pin location constraint (LOC) instead of the GT location constraint (GT_LOC).