You can also use the traditional design flow to create designs with both PL and embedded software components. In this case, the flow is similar to the embedded software design flow used for Zynq® UltraScale+™ MPSoCs. The hardware team is responsible for creating, verifying, and implementing a hardware design that is used by the software team to develop the embedded software application. This hardware design is considered a fixed platform, because the Vivado tools create the programmable logic on the device, and the Vitis™ tools cannot modify the PL.
Note: All recommendations for
the traditional design flow for hardware-only systems apply to the traditional design
flow for embedded systems.
Following are the main steps in this flow:
- Create and verify the hardware design using the Vivado IP integrator.
- Implement the hardware design using the Vivado implementation tools.
- Export the hardware design to the Vitis embedded software development flow.
- Develop the software application on top of the fixed hardware design using the Vitis embedded software development flow.
Important: This design
flow does not support programming of the AI Engine
cores and is therefore only suitable for Versal
Prime and Versal
Premium devices.