Navigating Content by Design Process - 2020.2 English

Xilinx® documentation is organized around a set of standard design processes to help you find relevant content for your current development task. All Versal™ ACAP design process Design Hubs can be found on the Xilinx.com website. This document covers the following design processes:

System and Solution Planning

Identifying the components, performance, I/O, and data transfer requirements at a system level. Includes application mapping for the solution to PS, PL, and AI Engine. Topics in this document that apply to this design process include:

• System Architecture
• System Planning
• Design Flows
• System Migration

Note: For more information, see the Versal ACAP System and Solution Planning Methodology Guide (UG1504).

Embedded Software Development

Creating the software platform from the hardware platform and developing the application code using the embedded CPU. Also covers XRT and Graph APIs. Topics in this document that apply to this design process include:

• Vitis Environment Design Flow
• Simulation Flows

Note: For more information, see the Programming the PS Host Application in the AI Engine Documentation flow of the Vitis Unified Software Platform Documentation (UG1416).

AI Engine Development

Creating the AI Engine graph and kernels, library use, simulation debugging and profiling, and algorithm development. Also includes the integration of the PL and AI Engine kernels. Topics in this document that apply to this design process include:

• AI Engine
• Vitis Environment Design Flow

Note: For more information, see the Versal ACAP AI Engine Programming Environment User Guide (UG1076) and Versal ACAP AI Engine Kernel Coding User Guide (UG1079).

Hardware, IP, and Platform Development​

Creating the PL IP blocks for the hardware platform, creating PL kernels, subsystem functional simulation, and evaluating the Vivado® timing, resource use, and power closure. Also involves developing the hardware platform for system integration. Topics in this document that apply to this design process include:

• Vivado Tools Design Flow
• Simulation Flows

Note: For more information, see the Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387).

System Integration and Validation​

Integrating and validating the system functional performance, including timing, resource use, and power closure. Topics in this document that apply to this design process include:

• Design Flows

Note: For more information, see the Versal ACAP System Integration and Validation Methodology Guide (UG1388).

Board System Design

Designing a PCB through schematics and board layout. Also involves power, thermal, and signal integrity considerations. Topics in this document that apply to this design process include:

• System Planning

Note: For more information, see the Versal ACAP Board System Design Methodology Guide (UG1506).