Using the Vivado Serial Analyzer to Debug PS-GTR Serial Links - 2024.1 English

Vivado Design Suite Tutorial: Programming and Debugging (UG936)

Document ID
UG936
Release Date
2024-06-12
Version
2024.1 English

IBERT AMD UltraScale+™ PS-GTR (IBERT PS-GTR) transceiver can evaluate and monitor PS-GTR transceivers in AMD Zynq™ UltraScale+™ MPSoC devices. With this feature, you can accomplish these tasks:

  • Perform eye scans with user data
  • Change PS-GTR settings
  • View link status
  • Check the “lock” status of all phase-locked loops (PLLs) used by all PS-GTR lanes

IBERT PS-GTR transceiver does not provide these capabilities:

  • Perform eye scans with raw pseudo-random binary sequence (PRBS) data patterns
  • Measure Bit Error Ratio (no bit or error counters)

This solution is purely software-based, meaning that no IP or logic is required in the programmable logic (PL) of the device. This documentation guides you through the setup of the PS-GTR Transceivers by creating a first-stage boot loader (FSBL). It demonstrates how to load the FSBL into the Zynq UltraScale+ MPSoC and use IBERT PS-GTR.

Tip: This is a supported feature in AMD Vivado™ Design Suite 2017.2 and above.