PS CAN FD Controller Interface

Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956)

Document ID
Release Date
1.11 English
Table 1. CAN FD Controller Interface
Symbol Description 1 Min Max Units
FCAN_FD_REFCLK 2 CAN FD reference clock frequency 1x 80 MHz
CAN FD reference clock frequency 2x 160 MHz
TCAN_FD_PWRX Receive pulse width 125 ns
TCAN_FD_PWTX Transmit pulse width 125 ns
  1. The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a 15 pF load.
  2. The APB interface (LPD_LSBUS_CLK) operating frequency must be greater than or equal to the CAN FD operating frequency (which is the CAN_FD_REFCLK frequency divided by the CAN[0|1]_REF_CTRL[DIVISOR]).