Versal AI Engine Graph Development - 2022.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2022-12-07
Version
2022.2 English

Versal adaptive compute acceleration platforms (ACAPs) combine Scalar Engines, Adaptable Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous computing for any application. Most importantly, Versal ACAP hardware and software are targeted for programming and optimization by data scientists as well as software and hardware developers.

Some Versal ACAP devices incorporate an array of very-long instruction word (VLIW) processors with single instruction multiple data (SIMD) vector units called, AI Engines, that are highly optimized for compute-intensive applications such as 5G wireless and artificial intelligence (AI) applications. When implementing an algorithm for a Versal AI Core or Versal AI Edge, it is important to understand what the AI Engine does well and what would be better implemented in the other engines, for example, the Scalar and Adaptable engines.

Important: The inclusion of AI Engine graph applications require the use of extensible platforms in your embedded system design to control the execution of the application.
Figure 1. Vitis AI Engine Development Flow

Embedded system designs using Versal AI Core devices can include AI Engine graph applications developed and tested using Vitis tools. The figure above shows the development flow for AI Engine graph applications in which individual kernel code is compiled and combined into the graph application.

As described in AI Engine Kernel and Graph Programming Guide (UG1079), an AI Engine kernel is a C/C++ program written using specialized intrinsic calls that target the VLIW SIMD vector processor. The AI Engine kernel code is compiled using the AI Engine compiler (aiecompiler) to compile the kernels to produce an ELF file that is run on the AI Engine processors.

An AI Engine program requires a data flow graph specification which is written in C++. This specification can be compiled and executed using the AI Engine compiler. An adaptive data flow (ADF) graph application consists of nodes and edges where nodes represent compute kernel functions, and edges represent data connections. The ADF graph is a static dataflow graph with the AI Engine kernels operating in parallel. Kernels operate on data streams, and are the fundamental building blocks of an ADF graph specification. These kernels consume input blocks of data and produce output blocks of data. Refer to AI Engine Kernel and Graph Programming Guide (UG1079) for more information.

As discussed in Using the Vitis IDE in UG1076, an AI Engine project can be built in the Vitis IDE as an Application project targeting the aiengine domain of a Versal AI Core device. The project can also be managed from the command line. The kernels and ADF graph are written as C++ code and compiled using the aiecompiler command as described in Compiling an AI Engine Graph Application, and simulated using the x86simulator or aiesimulator as described in Simulating an AI Engine Graph Application.

By default, the AI Engine compiler writes all outputs to a directory called ./Work and creates a file called libadf.a, where Work is a sub-directory of the current directory where the tool was launched, and libadf.a is written to the same directory as the AI Engine compiler was launched from and is used for linking with PL kernels and the extensible platform using the v++ command as explained in the next section.