XRT-managed RTL kernels can optionally have an interrupt port containing a single interrupt. The port name must be called
interrupt and be active-High. It is enabled when
both the global interrupt enable (GIE) and interrupt
enable register (IER) bits are asserted in the Control
Register block.
By default, the IER uses the internal ap_done
signal to trigger an interrupt. Further, the interrupt is cleared only when writing a 1
to bit-0 of the IP Interrupt Status Register.
This logic should be reflected in the Verilog code for the RTL kernel, and
also in the associated component.xml and kernel.xml files. The kernel.xml file is stored inside the kernel.xo file and is generated automatically when using the package_xo command or RTL Kernel Wizard.