Min Delay with Hold and Removal Checks - 2021.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
UG906
Release Date
2021-10-27
Version
2021.2 English
  • The best-case delays (fastest delays) of a given corner are used for the source clock path and data/reset path accumulated delay.
  • The worst-case delays (slowest delays) of the same corner are used for the destination clock path accumulated delay.

When mapped to the various corners, these checks become: