Memory Performance - 2021.2 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

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2021.2 English

The memory performance table provides details on registering and cascade settings where applicable.

Figure 1. Memory Performance Table

If the -include_path_info switch is specified, extra path information will be displayed as shown in the following figure.

Figure 2. -include_path_info

This section of the report shows REFNAME followed by the fanout (in brackets) of the worst case path through the Port A Data Output Path (data and parity bits). This is repeated for each bus on the memory. Where there is no fanout listed, it can be assumed that the shape will be packed together in the same slice and the fanout is 1.