Digital Down-conversion Chain Implementation on AI Engine (XAPP1351)

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1.0 English

This application note demonstrates an innovative method of designing adaptable, scalable, and resource-efficient DDCs on Versal AI Engine technology. The kernels and graphs are designed in C/C++, which is easy to maintain and reuse on various Versal ACAPs. The example design provided as part of the application note serves as a template for quick generation of customized DDC filter chains. The methodology introduced by this application note has a wide application to filter designs and is applicable to many use cases including but not limited to wireless signal processing.