- Source File Properties
- Opens the Source File
Properties window. For more information, see
Viewing Source File Properties.Note: In the Hierarchy window, this command is called Source Node Properties.
- Open File
- Opens source files as follows:
- Open With
-
Provides a list of alternate text editors to open the RTL source or constraint file. The path to the alternate text editor executable needs to be in your path environment variable. See the appropriate Windows or Linux documentation for help on how to add a path to your environment. If the required editor is not listed, select Custom Editor. In the Custom Editor Definition dialog box, enter the location of the executable and the command line syntax used to run the editor.
- Replace File
- Replaces the specified source file with another file.
- Copy File Into Project
- Copies selected source files and directories into the project directory. This command is enabled only when the selected source file is not currently local to the project.
- Copy All Files Into Project
- Copies all remotely referenced source files into the local project directory. This command is available only when the source files are not local to the project.
- Remove File From Project
- Deletes the selected source files from the project. Optionally, removes the files from the local project disk location.
- Enable File
- Sets the source file status to active for the project. You
can toggle source files between enabled and disabled to define different
design configurations.Note: You can also set the Enabled property in the Source File Properties window. For information, see Viewing Source File Properties.
- Disable File
- Sets the source file status to inactive for the project. You
can toggle source files between enabled and disabled to define different
design configurations. Disabled source files display as shaded gray in the
Sources
window.Note: Disabling the file removes the file from the compile list and hierarchy but does not remove the file from the project.
- Move to Simulation Sources
- Relocates currently selected design source files into the simulation set. If there is more than one simulation set, the application prompts you to select the simulation set to use.
- Move to Design Sources
- Relocates currently selected simulation source files into the design sources.
- Move to Top
- Relocates the currently selected source file to the top of the source file list in the Compile Order view. The compilation and synthesis of source files is handled in the order listed in Compile Order view, from top to bottom. The order of files affects the elaboration, synthesis, and simulation results. The file order displayed in the Compile Order view is automatically updated or can be manually defined depending on the setting of the Hierarchy Update command.
- Move Up
- Moves the currently selected source file up in the source file list.
- Move Down
- Moves the currently selected source file down in the source file list.
- Move to Bottom
- Moves the currently selected source file to the bottom of the source file list.
- Hierarchy Update
- Determines how the Vivado IDE responds to changes of the source files such as redefined top module,
added or removed files, or changed file order. Select one of the following:
- Automatic Update and Compile Order
- Specifies that the Hierarchy view
containing the design and the compilation order is automatically
updated as source files are changed. The Vivado IDE automatically
identifies and sets the best top module candidate. The compile
order is also automatically managed, as the top module file and
all sources that are under the active hierarchy are passed to
synthesis and simulation in the correct order. The files that
are outside of the hierarchy defined by the top module are not
used.Note: This setting is selected by default.
- Automatic Update, Manual Compile Order
- Specifies that the Hierarchy view
containing the design is automatically updated as source files
are changed, but that the compilation order is determined
manually. All files in the project are passed to synthesis and
simulation. The compilation order is manually defined by
ordering the files using the Move to Top,
Move
Up, Move Down, and
Move to
Bottom commands from the
Compile
Order view.Note: For imported ISEĀ® Design Suite projects, this setting is selected by default to preserve the compile order. If you do not need to preserve the compile order, you can change this setting to Automatic Update and Compile Order.
- No Update, Manual Compile Order
- Specifies that the Hierarchy view is not automatically updated, and that the compilation order is determined manually. To update the design hierarchy in this mode, use the Refresh Hierarchy command.
- Refresh Hierarchy
- Updates the design hierarchy to reflect the latest source file changes and top module definition. Use this command to manually refresh the hierarchy as needed.
- IP Hierarchy
- Controls the expansion of the IP displayed in the
Hierarchy
view. By default, all IP hierarchy is collapsed.
- Show All IP Hierarchy
- Expands the hierarchy for all IP in the
Hierarchy view.Note: Depending on the number of IP in your design, this command might slow down the refresh for the automatic update of the Hierarchy view.
- Hide All IP Hierarchy
- Collapses the hierarchy for all IP in the Hierarchy view.
- Show IP Hierarchy
- Shows the hierarchy for the selected IP.
- Hide IP Hierarchy
- Hides the hierarchy for the selected IP.
- Set as Top
- Specifies the Top Module to define the starting point for
elaboration of the design hierarchy for synthesis and simulation
purposes.Important: The top module is automatically reset to the best candidate if the specified top module cannot be found in the design source files, and the hierarchy update mode is set to automatic. In the Sources window, the top module is indicated by the top module icon .
- Set Global Include
- Defines the specified file as a global include file. This
command is available for Verilog source files only.Note: You can also set the Global Include property in the Source File Properties window. For information, see Viewing Source File Properties.
- Clear Global Include
- Clears the Global Include property from the selected Verilog source file.
- Make Active
- Makes the selected Constraint Set the active constraint set for synthesis or implementation.
- Set as Target Constraint File
- Specifies the file to which Vivado IDE writes new constraints. For more information on design constraints, see this the Vivado Design Suite User Guide: System-Level Design Entry (UG895) and see the Vivado Design Suite User Guide: Using Constraints (UG903).
- Set as Out-of-Context for Synthesis
- Creates a new file set and synthesis run, which enables you
to synthesize the selected level of hierarchy out of context from the rest
of the design. For more information, see the Setting a Bottom-Up
Out-of-Context Flow section in the
Vivado
Design Suite User Guide: Synthesis (UG901).Note: This option only works on levels of RTL hierarchy shown in the Sources window.
- Set Library
- Sets a library for the selected RTL source files. You can
choose from a list of libraries that are currently defined in the project,
or type a new library in the text entry field. Entering a new library adds
it to the list of currently defined libraries.Note: You can also set the Library property in the Source File Properties window. For information, see Viewing Source File Properties.
- Set File Type
- Sets the type of the currently selected file or files. The
Vivado IDE automatically recognizes
the type of a file as it is added to the project based on appropriate file
extensions. However, you can use the Set File Type command to redefine the file type in
cases of non-standard file extensions.Note: You can also set the Type property in the Source File Properties window. For information, see Viewing Source File Properties.
- Set Used In
- Specifies the tools the file is used for. You can specify a
source file to be used or not used during synthesis, simulation, or
implementation. Disabling a source file for a particular tool prevents that
file from being used by that tool.
For example, if you set a source file as not used in synthesis, and then open the elaborated design, a black box displays for that source file. Disabling an EDIF or NGC source file from implementation prevents it from being used during implementation.
Note: You can also set the Used In property in the Source File Properties window. For information, see Viewing Source File Properties. - Edit Constraint Sets
- Creates and modifies constraint sets.
- Edit Simulation Sets
- Creates and modifies simulation sets.
- Add Sources
- Adds or creates constraint files, simulation source files, and design sources. Design sources include HDL and netlist files as well as existing IP and block designs.
- Go to Source
- Opens the source file in which the module or instance is defined.