Selectable Width and Depth - 1.0 English

Embedded Memory Generator LogiCORE IP Product Guide (PG326)

Document ID
Release Date
1.0 English

The Embedded Memory Generator core generates memories up to 50 megabits, and with depths of two or more words. The memory is built by concatenating block RAM/UltraRAM/distributed RAM primitives.

Write operations to out-of-range addresses are guaranteed not to corrupt data in the memory, while read operations to out-of-range addresses can return invalid data. The set/reset function should not be asserted while accessing an out-of-range address as this also results in invalid data on the output in the present or following clock cycles depending upon the output register stages of the core.

Operating Mode (Only for Block RAM/UltraRAM)

The operating mode for each port determines the relationship between the write and read interfaces for that port. Port A and port B can be configured independently with any one of three write modes: write first mode, read first mode, or no change mode. These operating modes are described in the sections that follow.

The operating modes have an effect on the relationship between the A and B ports when the A and B port addresses have a collision. For detailed information about collision behavior, see Collision Behavior . For more information about operating modes, see the block RAM/UltraRAM section of the user guide specific to the device family.

  • Write First Mode: In the write first mode, the input data is simultaneously written into memory and driven on the data output, as shown in the following figure. This transparent mode offers the flexibility of using the data output bus during a write operation on the same port.
Figure 1. Write First Mode Example

This operation is affected by the optional byte-write feature. It is also affected by the optional read-to-write aspect ratio feature. For detailed information, see Write First Mode Considerations .

  • Read First Mode: In the read first mode, data previously stored at the write address appears on the data output, while the input data is being stored in memory. This behavior is illustrated in the following figure.
Figure 2. Read First Mode Example
  • No Change Mode: In the no change mode, the output latches remain unchanged during a write operation. As shown in the following figure, the data output is still the previous Read data and is unaffected by a write operation on the same port.
Figure 3. No Change Mode Example