Register Space - 2024.1 English - PG252

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

Document ID
PG252
Release Date
2024-05-30
Version
2024.1 English

The Zynq UltraScale+ MPSoC VCU soft IP implements registers in the programmable logic. The following table summarizes the soft IP registers. These registers are accessible from the PS through the AXI4-Lite bus.