Introduction - 2024.1 English

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

Document ID
PG252
Release Date
2024-05-30
Version
2024.1 English

The VCU Sync IP core is a video buffer fence IP designed to be used with the AMD Zynq™ UltraScale+™ MPSoCs EV series designs. This section provides information about using, customizing, and simulating the VCU Sync IP core for Zynq UltraScale+ MPSoCs. It also describes the architecture and provides details on customizing and interfacing to the VCU.