| Address Offset | Width | Type | Reset Value | Description |
|---|---|---|---|---|
| 0x41074 | 32 | RW | 0x0 | Ensure there is no pending AXI transaction in VCU AXI bus/AXI4-Lite bus before accessing the register. Assert and
deassert vcu_resetn signal before accessing the
register. |
| Field Name | Bits | Type | Reset Value | Definition |
|---|---|---|---|---|
| VCU_GASKET_INIT | [31:2] | RW | 0x0 | |
| 1 | Bit 1 is set to 0 to assert reset to VCU. Software needs to de-assert it to 1 for out of reset | |||
| 0 | Bit 0 is set to 1 to remove gasket isolation after VCUINT_VCU fully
ramps, VCCAUX fully ramps, and the PL is programmed
Note: Read value of VCU_GASKET_INIT[0] is inverse
of the Write value
|