Before VCU applications can be run successfully in PetaLinux, changing the Quality of Service (QoS) settings can be required to change the priority of any AFI port to read/write data and can help with bandwidth related issues. Changing the QoS settings and the command issuing capabilities of the AXI ports to the VCU Decoder (M_AXI_DEC0 and M_AXI_DEC1) must be modified to avoid traffic congestion with respect to Display port in case of decode and display use-case. If the QoS settings are not modified, the DisplayPort/HDMI transmission can under-run, producing green or black frames intermittently during video playback. Not increasing the command issuing capability can limit the framerate for challenging settings such as 4kp60.
See Designing with the Core regarding the ports connected to the decoder. Understanding where the following addresses came from will enable you to adjust the following commands for designs using alternate AXI connection. See the Zynq UltraScale+ Device Register Reference (UG1087) for AXI control register addresses and settings.
- Boot the board using a PetaLinux pre-built image.
- Login with username:root and password:root
- Set read and write QoS of the port connected to M_AXI_DEC0
- Set the S_AXI_HP0_FPD RDQoS (AFIFM) register to
LOW_PRIORITY
devmem 0xFD380008 w 0x3
- Set the S_AXI_HP0_FPD WRQoS (AFIFM) register to
LOW_PRIORITY
devmem 0xFD38001C w 0x3
- Set the S_AXI_HP0_FPD RDQoS (AFIFM) register to
LOW_PRIORITY
- Set read and write QoS of the port connected to M_AXI_DEC1
- Set the S_AXI_HP3_FPD RDQoS (AFIFM) register to
LOW_PRIORITY
devmem 0xFD3B0008 w 0x3
- Set the S_AXI_HP3_FPD WRQoS (AFIFM) register to
LOW_PRIORITY
devmem 0xFD3B001C w 0x3
- Set the S_AXI_HP3_FPD RDQoS (AFIFM) register to
LOW_PRIORITY
- Increase the read and write issuing capability of the port connected to
M_AXI_DEC0. By default, it can take a maximum of four requests at a time, and
increasing the issuing capability can keep the ports busy with always some
requests in the queue.
- Set the S_AXI_HP0_FPD RDISSUE (AFIFM) register to allow
16
commands
devmem 0xFD380004 w 0xF
- Set the S_AXI_HP0_FPD WRISSUE (AFIFM) register to allow
16
commands
devmem 0xFD380018 w 0xF
- Set the S_AXI_HP0_FPD RDISSUE (AFIFM) register to allow
16
commands
- Increase the read and write issuing capability of the port connected to
M_AXI_DEC1
devmem 0xFD3B0004 w 0xF
- Set the S_AXI_HP3_FPD WRISSUE (AFIFM) register to allow
16 commands
Set the S_AXI_HP3_FPD RDISSUE (AFIFM) register to
allow 16
commands
devmem 0xFD3B0018 w 0xF
- Set the S_AXI_HP3_FPD WRISSUE (AFIFM) register to allow
16 commands
Set the S_AXI_HP3_FPD RDISSUE (AFIFM) register to
allow 16
commands
Now, the GStreamer, OMX, and Control Software pipelines can be run on the board.