PS and PMC I2C Controller Interface

Versal HBM Series Data Sheet: DC and AC Switching Characteristics (DS960)

Document ID
DS960
Release Date
2024-07-24
Revision
1.5 English
Table 1. I2C Controller Interface
Symbol Description 1 Min Max Units
I2C Fast-mode Interface
FI2CF_CLK Serial clock line (SCL) clock frequency 400 kHz
FI2C_REFCLK 2 I2C reference clock frequency 100 MHz
TI2CFCKL SCL Low time 1.3 µs
TI2CFCKH SCL High time 0.6 µs
TI2CFCKO Serial data line (SDA) clock-to-out delay 900 ns
TI2CFDCK SDA input setup time 100 ns
TI2CFCKD SDA input data hold time 0 ns
I2C Standard-mode Interface
FI2CS_CLK SCL clock frequency 100 kHz
FI2C_REFCLK 2 I2C reference clock frequency 100 MHz
TI2CSCKL SCL Low time 4.7 µs
TI2CSCKH SCL High time 4.0 µs
TI2CSCKO SDA clock-to-out delay 3450 ns
TI2CSDCK SDA input setup time 250 ns
TI2CSCKD SDA input data hold time 0 ns
  1. The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a 15 pF load.
  2. FI2C_REFCLK specification applies to PMC_I2C_REFCLK, LPD_I2C0_REFCLK, LPD_I2C1_REFCLK, and SYSMON_I2C_REFCLK.