| CPM |
Integrated block for PCIe with DMA and cache coherent
interconnect |
| CCIX |
Cache Coherent Interconnect for Accelerator |
| CML |
Coherent Multi-chip Link |
| CXS |
CCIX Streaming Interface |
| ELA |
Extended Logic Analyzer |
| ESM |
CCIX Extended Speed Mode of 20 GT/s and 25 GT/s; also
referred to as EDR in this document |
| CIPS |
Control, Interfaces and Processing System IP core. |
| PCSR |
Programming Control and Status Register |
| CRC |
Clock Reset CPM |
| CPI |
CPM PL Interface |
| DVSEC |
Designated Vendor Specific Extended Configuration
Space |
| EDR |
Extended Data Rate |
| PoC |
Point of Coherency |
| NoC |
Network on Chip |
| CMN |
Coherent Mesh Network |
| RAS |
Reliability, Availability, and Serviceability |