Implementing the PHY - 2022.1 English

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)

Document ID
Release Date
2022.1 English

For each memory controller, the Vivado tools synthesize and stitch the physical layer (PHY) into the netlist during implementation when Phase 1 of the opt_design command is run, as shown in the following figure.

Figure 1. Implementing PHY During opt_design