Validating I/O and Clock Planning - 2022.1 English

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)

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2022.1 English

After performing I/O and clock planning, you validate your design to ensure that it meets design requirements. The Vivado® tools allow you to run DRCs to check for violations and perform SSN Analysis to estimate switching noise levels. To perform a final validation on your I/O and clock assignments, you must implement the design and generate a bitstream.