Setting Device Configuration Modes - 2022.1 English

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)

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2022.1 English

Because Xilinx device configuration data is stored in CMOS latches, the device must be reconfigured each time it is powered up. The bitstream is loaded into the device through special mode configuration pins that serve as the interface for a number of different configuration modes. The specific configuration mode is selected by setting the appropriate voltage level on dedicated input pins.

Each configuration mode has a corresponding set of interface pins that span one or more I/O banks on the device. Bank 0 contains the dedicated configuration pins and is always part of every configuration interface. Bank 65 in UltraScale™ and UltraScale+™ devices and Banks 14 and 15 in 7 series devices contain multifunction pins that are used in various configuration modes. For information on the available device configuration modes, see the Configuration User Guide for your device. For information on analyzing how the configuration modes might conflict with other multifunction pins, see Multifunction Pins.

To set device configuration modes and view information about the modes:

  1. Select Tools > Edit Device Properties.
  2. In the Edit Device Properties dialog box (see the following figure), select the Configuration Modes category, do the following, and click OK to close the dialog box:
    • Enable the check box for a configuration mode to set that configuration mode. When you set a configuration mode:
      • The associated I/O pins display in the Config column of the Package Pins window.
      • The following constraints are created when you save the design:
        set_property BITSTREAM.CONFIG.PERSIST NO [current_design]
        set_property CONFIG_MODE <configuration_mode> [current_design]
    • Click a configuration mode to open a dialog box in which you can view information, including a description, configuration diagram, and links to more information. Click Print to print the configuration diagram.
    • Enable Prohibit usage of the configuration pins as user I/O and persist after configuration to ensure that pins are used as configuration pins and not as general purpose I/Os after configuration. When you select this option, the following constraint is created when you save the design:
      set_property BITSTREAM.CONFIG.PERSIST YES [current_design]
      Note: For more information on the configuration bitstream settings, see section "Device Configuration Bitsream settings" in the Vivado Design Suite User Guide: Programming and Debugging (UG908).
    Important: The JTAG configuration mode is always selected. You can select one configuration mode in addition to the JTAG configuration mode.
  3. Select File > Constraints > Save to save the constraints to the target XDC file.
    Note: The Tcl command equivalent is: save_constraints
    Tip: When setting device configuration modes, you can undo your last action using Edit > Undo. Alternatively, you can enter undo in the Tcl console.